A 3-V 12-Bit second order sigma-delta modulator design in 0.8-μm CMOS

摘要

This paper examines the design and simulation of a 12-bit Sigma-Delta Modulator that operates from a single 3-V power supply. The proposed modulator has been designed with fully-differential switched-capacitor integrators implemented with folded-cascode operational amplifiers. The main feature of the designed modulator is its simplicity. It shows that it is possible to design a precise modulator of moderated Signal-to-Noise Ratio (SNR) using simple circuits which do not require precise component matching and high precision components or trimming. The modulator achieves a SNR higher than 74dB for all the simulated cases with an oversampling ratio of 128 and an oversampling frequency of 2.56MHz. The modulator was designed in a 0.8-μm CMOS technology and it measures 560pm × 680pm.