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INTEGRITY OF WAVEFORM SIMULATION

机译:波形模拟的完整性

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摘要

This paper presents of experimental results for verifying integrity of waveform simulation. To compare accuracy and speed of simulation between SPICE and Boolean process based waveform simulation, we simulate the combinational circuits of ISCAS'85 with both. Experimental results show that the output waveforms of Boolean process based waveform simulation is considerably consistent with that of SPICE, but several ten thousands times faster than HSPICE. Factors that contribute the most to component delay are analyzed. A more accurate delay model, 3-FACTOR, is then introduced to further reflect practice when the waveform simulator is applied.
机译:本文介绍了验证波形模拟完整性的实验结果。为了比较Spice和Boolean进程基于波形模拟的模拟精度和速度,我们模拟了ISCAS'85的组合电路。实验结果表明,基于布尔过程的波形模拟的输出波形与香料的波形模拟相当一致,但比HSPICE快几十万倍。分析了对组分延迟产生最大贡献的因素。然后引入更准确的延迟模型,3因素以进一步反映在应用波形模拟器时的实践。

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