Fault cubic simulation for digital devices

摘要

Methods and models of a digital circuit analysis for test generation and fault simulation are offered. The two-frame cubic algebra fur compact cubic coverings of sequential primitive design, faulty and fault-free simulation of digital circuits is used. Problems of digital circuits testing are formalized as linear equations. The cubic method of primitive fault simulation, which allows: to transport input fault lists to primitive outputs; to generate analytical equations for digital circuit deductive simulation of the gate, functional and algorithmic description levels.