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Fixed structure systolic array and processing of images

机译:固定结构收缩系统阵列和图像处理

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The paper presents a fixed structure systolic array for performing a set of computationally and real-time demanding problems that frequently arise in the area of image processing. The fixed structure systolic array implements Faddeeva's (1959) algorithm, which could be interpreted as a generalised Gauss elimination. Modification of the algorithm is considered for improved stability and accuracy. The computations of the modified algorithm are presented in the form of a signal flow graph (SFG). This is followed with possible applications and additional extensions of the proposed systolic array structure.
机译:本文呈现了一种固定结构收缩阵列,用于执行经常出现在图像处理领域的一组计算上和实时要求的问题。固定结构收缩系统阵列实现Faddeeva(1959)算法,可以解释为广义高斯消除。考虑了算法的修改,以提高稳定性和准确性。修改算法的计算以信号流程图(SFG)的形式呈现。这是可能的应用程序和所提出的收缩系统阵列结构的应用和附加扩展。

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