Design and implementation of a centralised batching arbitration unit with a timeout feature

摘要

The design of an arbiter poses a number of problems. This paper presents the operation of batching and timeout facilities as applicable to an arbiter and the logical design of a centralised batching arbiter with a timeout featuer. Petri net modelling of the combined arbiter unit shows that the arbiter can be usefully employed in a number of situations, particularly in multiprocessor systems. We show that batching and timeout are two features which provide additional means to alter priority and fairness of requesting devices at runtime.