On-line testing of a discrete PID regulator-a case study

摘要

Most digital circuits synthesized from a finite state machine contain idle functional units (modules) at some time during operation, in the sense that they do not contain any valid data. In a synchronous circuit with an on-chip synthesized controller which explicitly determines the flow of data, the idle functional units are known in advance for each FSM stage. A case study of the implementation of an online built-in self test that exploits the idle modules is presented. A concurrent test data path which cycles test vectors through the idle functional units and produces a response signature is synthesized along with the original algorithm, avoiding test time overheads.