Careful page mapping has been shown in the past to be effective for reducing cache conflicts on both uniprocessor and Uniform Memory Access (UMA) multiprocessors. This paper extends previous page-mapping schemes to the more recent Cache-Coherent Non-Uniform Memory Access (CC-NUMA) multiprocessors. These extensions maintain the program's data-task affinity, which is important to CC-NUMA, while reducing cache set conflicts by carefully selecting the page frames. Using an execution-driven simulator that simulates a CC-NUMA machine with a 4-MB secondary cache and a 16-KB primary cache on each of the 4-issue super-scalar processors, we find that, when non-coherence cache misses are relatively heavy, it is quite important for page mapping to preserve the compiler-generated memory module ID (MID) which determines data distribution among the processors. We also find that straight application of page-coloring performs worse than bin-hopping by 10-45%, while by hashing the page color with part of the MID, page-coloring can perform closely to bin-hopping.
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