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Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology

机译:基于DAC的-40DB PSRR可配置输出LDO在BCD技术中

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This paper presents a current DAC based configurable wide output voltage range Low Drop-Out (LDO) regulator. This LDO uses a multi-supply operational amplifier architecture that uses low supply voltage (1.8V) for input stage in differential amplifier and high supply voltage (5V) for output stage. A nested miller compensation combined with buffer compensation scheme is presented that provides a fast transient response and full range AC stability from 0 to 100mA load current for an output capacitive load of 50pF using compensation capacitor of 5pF. LDO output is configurable using internal current based digital to analog converter (DAC) and output voltage ranges from 2.3V to 5.5V with a step of 107mV. Total loop gain of LDO is 127dB at DC and PSRR is -40dB at 1MHz frequency for no current load condition. Presented LDO is designed in 110nm STMicroelectronics BCD9s technology; consuming 30μA of total ground current (without current DAC).
机译:本文介绍了基于DAC的可配置宽输出电压范围低掉掉(LDO)调节器。该LDO使用多电源运算放大器架构,该架构使用低电源电压(1.8V),用于输出级的差分放大器和高电源电压(5V)。提出了一种与缓冲补偿方案相结合的嵌套米勒补偿,其提供快速的瞬态响应和全范围AC稳定性,从0到100mA负载电流,使用5PF的补偿电容为50PF的输出电容负载。 LDO输出可使用基于内部电流的数字到模拟转换器(DAC),输出电压范围为2.3V至5.5V,步长107mV。 LDO的总环路增益为127dB,在DC和PSRR为-40dB,在1MHz频率下,无电流负载条件。呈现LDO设计在110nm STMicroelectronics BCD9S技术;消耗30μA的总接地电流(无电流DAC)。

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