Parallel computer architectures with flexible topology are ideal for compute intensive signal processing and instrumentation applications because they provide supercomputing performance and high I/O bandwidth. These systems can be implemented at low cost using processors like the transputer, the TMS320C40, or the ADSP-21060. However, due to difficulties with hardware and software complexity management, the number of successful large-scale applications is limited. Modeling the system graphically from multiple aspects-hardware and software-and automatically processing the models helps manage the complexity of these systems. The presented approach supports automatic topology verification, network loader configuration, process assignment, and deadlock-free message routing.
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