Performance issues for the 88110 RISC microprocessor

摘要

The Motorola 88110 RISC (reduced instruction set computer) microprocessor is a second-generation, superscalar implementation of the 88000 architecture that is capable of achieving extremely high-performance for a broad class of general-purpose and scientific applications. In order to attain this performance, however, a balance is needed between hardware and software. With the development of optimizing compilers and accurate simulation tools for the 88110 it has been possible to begin tuning 88110 performance long before a system becomes available for software development and experimentation. The author describes the compilation and simulation environments developed for the 88110, and summarizes a number of key performance issues for the processor.