Using multiple FPGA architectures for real-time processing oflow-level machine vision functions

摘要

In this paper, we investigate the use of multiple fieldprogrammable gate array (FPGA) architectures for real-time machinevision processing. The use of FPGAs for low level processing representsan excellent tradeoff between software and special purpose hardwareimplementations. A library of modules that implement common low-levelmachine vision operations is presented. These modules are designed withgate-level hardware components that are compiled into the functionalityof the FPGA chips. A common input/output interface is created for use ineach of the modules, allowing the interconnection of several imageprocessing modules in a parallel or pipelined manner. This newsynchronous, unidirectional interface establishes a protocol for thetransfer of image and result data between modules. This reduces thedesign complexity and allows several different low-level operations tobe applied to the same input image. A method is developed to partitionand compile the design into the hardware resources of multiple FPGAchips. Experimental results verify the efficiency of using commonmultiple FPGA architectures to implement real-time machine visionprocessing