A stepwise refinement data path synthesis procedure for easytestability

摘要

This paper presents a new data path synthesis algorithm whichtakes into account simultaneously three important design criteria:testability, design area, and total execution time. We define a goodnessmeasure on the testability of a circuit based on three rules of thumbintroduced in prior work on synthesis for testability. We then develop astepwise refinement synthesis algorithm which carries out the schedulingand allocation tasks in an integrated fashion. Experimental results forbenchmark and other circuit examples show that we are able to enhancethe testability of circuits with very little overheads on design areaand execution time