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Value prediction for security (VPsec): Countering fault attacks in modern microprocessors

机译:安全性的值预测(VPsec):应对现代微处理器中的故障攻击

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This work proposes VPsec, a novel hardware-only scheme that leverages value prediction in an embodiment and system design to mitigate fault attacks in general purpose microprocessors. The design of VPsec augments value prediction schemes in modern microprocessors with fault detection logic and reaction logic, to mitigate fault attacks to both the datapath and the value predictor itself. VPsec requires minimal hardware changes (negligible area impact) with respect to a baseline processor supporting value prediction, it has no software overheads {no increase in memory footprint), and, under common attack scenarios, it retains most of the performance benefits of value prediction. Our evaluation of VPsec demonstrates its efficacy in countering fault attacks and retaining performance in modern microprocessors.
机译:这项工作提出了VPsec,这是一种新颖的纯硬件方案,该方案利用实施例和系统设计中的值预测来减轻通用微处理器中的故障攻击。 VPsec的设计通过故障检测逻辑和反应逻辑增强了现代微处理器中的值预测方案,从而减轻了对数据路径和值预测器本身的故障攻击。相对于支持值预测的基准处理器,VPsec要求的硬件更改最少(对区域的影响可忽略不计),它没有软件开销(内存占用没有增加),并且在常见的攻击情形下,它保留了值预测的大部分性能优势。我们对VPsec的评估证明了它在抵抗故障攻击和保持现代微处理器性能方面的功效。

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