Multi-chip heterogeneously integrated array of active three-terminal transistor lasers and passive photonic structures for electronic-photonic integration on silicon

摘要

An array of active photonic devices is fabricated in unison after a heterogeneous integration process first metal-eutecticallybonds these distinct materials as a distribution onto a silicon host wafer. The patterning out of heterogeneous materialsfollowed by the formation of all photonic devices allows for wide-area fine-alignment without the need for discrete diealignment or placement. The integration process is designed as a CMOS-compatible, scalable method for bringing togetherdistinct III-V epitaxial structures and optical-waveguiding epitaxial structures, demonstrating the capabilities of forminga multi-chip layer of photonic materials. Integrated GaAs-based vertical light-emitting transistors (LET) are designed andfabricated as the active devices whose third electrical terminal provides an electrical interconnect and thermal dissipationpath to the silicon host wafer. The performance of these devices as both electrical transistors and spontaneous-emissionoptical devices is compared to their monolithically-integrated counterparts to investigate improvements in devicecharacteristics when integrated onto silicon. The fabrication methods are modified and optimized for thin-film transferredmaterials and are then extended to transistor laser (TL) fabrication. Passive waveguiding structures are designed andsimulated for coupling light from the active devices, and their fabrication scheme is presented such that it can be similarlyperformed with transferred materials. Work toward the demonstration of integrated transistor lasers is shown to representprogress toward an electronic-photonic circuit network. The combination of heterogeneous integration with three-terminalphotonic structures enables an elegant solution to both packaging and signal interconnect constraints for theimplementation of photonic logic in silicon photonics systems.