Two branch predictor schemes for reduction of misprediction rate inconditions of frequent context switches

摘要

Branch misprediction is one of the important causes of performancedegradation in superpipelined and superscalar processors. Most of theexisting branch predictors, based on the exploiting of branch history,suffer from prediction accuracy decrease caused by frequent contextswitches. The goal of this research is to reduce misprediction rate(MPR) when the context switches are frequent, and not to increase theMPR when the context switches are relatively rare. We propose twoindependent, but closely related modifications of global adaptiveprediction mechanisms: first, to flush only the branch history register(BHR) at context switch, instead of reinitialization of the wholepredictor, and second, to use two separated BHRs, one for user and onefor kernel branches, instead of one global history register. We haveevaluated the ideas by measurements on real traces from IBS (InstructionBenchmark Set), and have shown that both modifications reduce MPR atnegligible hardware cost