A method for path allocation for use with three-stage ATM switchesthat feature multiple channels between the switch modules in adjacentstages is described. The method is suited to hardware implementationusing parallelism to achieve a very short execution time. This allowspath allocation to be performed anew in each time slot. A detaileddescription of the necessary hardware is presented. This hardware countsthe number of cells requesting each output module, allocates a paththrough the intermediate stage of the switch to each cell, and generatesa routing tag for each cell, indicating the path assigned to it
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