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Embedded Control Systems Design based on RT-DEVS and temporal analysis using UPPAAL

机译:基于RT-DEVS的嵌入式控制系统设计和使用UPPAAL的时间分析

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This work is concerned with modelling, analysis and implementation of embedded control systems using RT-DEVS, i.e. a specialization of classic DEVS (Discrete Event System Specification) for real-time. RT-DEVS favours model continuity, i.e. the possibility of using the same model for property analysis (by simulation or model checking) and for real time execution. Special case tools are proposed in the literature for RT-DEVS model analysis and design. In this work, temporal analysis exploits an efficient translation in UPPAAL timed automata. The paper shows an embedded control system model and its exhaustive verification. For large models a simulator was realized in Java which directly stems from RT-DEVS operational semantics. The same concerns are at the basis of a real-time executive. The paper discusses the implementation status and, finally, indicates research directions which deserve further work.
机译:这项工作涉及使用RT-DEVS的嵌入式控制系统的建模,分析和实现,即实时经典DEVS(离散事件系统规范)的专业化。 RT-DEVS支持模型连续性,即可以使用同一模型进行属性分析(通过仿真或模型检查)和实时执行。文献中提出了用于RT-DEVS模型分析和设计的特殊情况工具。在这项工作中,时间分析利用UPPAAL定时自动机中的有效转换。本文展示了一个嵌入式控制系统模型及其详尽的验证。对于大型模型,在Java中实现了一个模拟器,该模拟器直接源于RT-DEVS操作语义。实时主管人员也有同样的担忧。本文讨论了实施现状,最后指出了值得进一步研究的研究方向。

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