Low-Speed Operation of a Motor Drive System Using Dual Inverters to Reduce Input Current Harmonics

摘要

This paper proposes a switching pattern for a dual inverter system that can reduce the carrier component of input current harmonics. The proposed system consists of the main inverter (Inv.1), a floating inverter (Inv.2), and an open-end winding machine. The conventional method has a disadvantage as it requires a large-capacitance because the fluctuation of the DC link voltage of Inv.2 increases when the motor operates at a low speed. The proposed switching pattern consists of an Inv.1 does 18-step drive (switching at 18 times the fundamental frequency of the load) and Inv.2 does pulse width modulation. The voltage of the Inv.2 side capacitor can be controlled by using the phase shift for Inv.1. Moreover, any voltage can be output to the load by performing reactive power compensation with Inv.2. By adopting the proposed switching pattern, the voltage fluctuation of the capacitor is reduced without affecting the harmonics of the input current; therefore, the capacitance can be reduced. The validity of the proposed system is confirmed with a prototype. The proposed system can reduce the capacity of the Inv.2 side capacitor by about 14.5% to 31.6%. Moreover, the transition between modes has also been confirmed by experiments.