A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability using a Duty-Cycled Digital Frequency-Locked Loop

摘要

This work presents an on-chip oscillator for energy-efficient IoT applications based on a duty-cycled digital frequency-locked loop (DFLL). The digital implementation allows low-voltage operation at 0.5V to reduce energy and enable voltage rail integration with low-energy digital logic, while the duty-cycled operation further improves energy efficiency to a record value of 18.8fJ/cycle (10.5nW @ 560kHz) while maintaining a high temperature stability of 96.1ppm/°C from 0°C to 100°C.