This paper presents a wideband and energy-efficient single-loop 3rd order CTSDM enabled by an ELD-SAB-Merged integrator and a 3-stage opamp. We utilize only a single DAC and opamp to accomplish the ELD compensation in the SAB structure. While featuring a PSQ technique and a 1st order NS-SAR, the 28nm prototype achieves a 74.4dB SNDR in a 50MHz BW and consumes 10.4mW with 171.2dB FoMS.
展开▼
机译:本文提出了一种宽带,高能效的单回路3
rd sup>
订购由ELD-SAB合并的集成器和3级运算放大器启用的CTSDM。我们仅利用单个DAC和运算放大器来完成SAB结构中的ELD补偿。同时具有PSQ技术和1
st sup>
如果订购NS-SAR,则28nm原型在50MHz带宽中可实现74.4dB SNDR,并以17.1.2dB FoM消耗10.4mW
S inf>
。
展开▼