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31 Reduction of power consumption using active inductor at TX and AC termination at RX for a low-power post-LPDDR4 interfaces

机译:31 %在RX处使用有源电感在TX和AC终端的功耗降低功耗,用于低功耗后LPDDR4接口

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A power reduction scheme that uses AC termination at RX and a TX output driver with an active inductor part (AIP) is proposed for a point-to-point post-LPDDR4 interface at 8 Gb/s. AC termination at the receiver I/O can reduce the power consumption by preventing DC power loss. However, this does not match the 50Ω termination, resulting in inter symbol interference (ISI). The proposed AIP in the TX output driver reduces the low-frequency gain and the ISI due to AC termination. This reduces the jitter caused by AC termination of the RX and greatly improves the eye-opening. In this paper, the AC termination at the RX and the AIP in the TX were implemented in a 28-nm CMOS process and operated at 8 Gb/s with a 3 inch FR4 microstrip line. The proposed transceiver chip achieves a peak-to-peak jitter of 43.6 ps and power reduction of 31% compared with chips without AC termination and AIP.
机译:在RX和TX输出驱动器上使用具有活动电感器部分(AIP)的电力降低方案,用于8 GB / s的点对点后LPDDR4接口。接收器I / O处的交流终端可以通过防止直流功率损耗来降低功耗。但是,这与50Ω终端不匹配,导致符号间干扰(ISI)。 TX输出驱动器中的所提出的AIP由于交流终止而降低了低频增益和ISI。这减少了Rx的交流终端引起的抖动,并且大大改善了眼睛开口。在本文中,在TX中的RX和AIP处的AC终端在28-NM CMOS工艺中实现,并在8英寸/秒的内部操作,具有3英寸FR4微带线。与没有交流终止和AIP的芯片相比,所提出的收发器芯片达到43.6 PS和31%的功率降低的峰值抖动。

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