A 340nW/Channel Neural Recording Analog Front-End using Replica-Biasing LNAs to Tolerate 200mVpp Interfere from 350mV Power Supply

摘要

This paper presents an 8-channel power-efficient neural recording analog front-end (AFE) with high power-supply rejection ratio (PSRR) and wide dynamic range. The ultra-low power is achieved by using a low supply voltage current-reusing input stage in the low noise amplifier (LNA). In order to improve the PSRR in low supply voltage amplifiers, we propose a replica biasing circuit to generate the biasing current, which is insensitive to the supply noise. Furthermore, the dynamic range is enlarged by utilizing an averaged local field potential (A-LFP) feedback loop. The prototype is fabricated in a 65nm CMOS process. Each channel of the AFE occupies 0.04mm² and only consumes 340nW from 0.35V/0.7V dual supply. The AFE provides a maximum gain of 54dB with 6.7μV input-referred noise integrating from 0.5Hz to 6.5 kHz. The proposed 0.35V input stage can tolerate a supply interferer up to 200mVpp, while maintaining a PSRR of 74dB.