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A MLC STT-MRAM based Computing in-Memory Architec-ture for Binary Neural Network.

机译:基于MLC STT-MRAM的二进制神经网络内存中计算架构。

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Due to add operations dominated computation and simplified network in Binary Neural Network(BNN), it is promising for TOT scenarios, which demand ultra -low power consumption and hardware area overhead. By means of exploiting the in -memory computing methods and high density of MLC STT-MRAM, this work designs a MLC-STT-CIM (Computein-Memory) based computing in -memory architecture to achieve add operations for BNN, to further reduce power consumption and area overhead
机译:由于在二进制神经网络(BNN)中以运算为主导的运算和简化的网络,对于要求超低功耗和硬件面积开销的TOT场景是有希望的。通过利用内存中的计算方法和MLC STT-MRAM的高密度,这项工作设计了一种基于MLC-STT-CIM(计算机内存)的内存中计算架构,以实现BNN的加法运算,从而进一步降低功耗消耗和面积开销

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