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MTJ-Based Nonvolatile Ternary Logic Gate for Quantized Convolutional Neural Networks

机译:基于MTJ的非易失性三元逻辑门用于量化卷积神经网络

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摘要

A ternary logic gate based on MTJ-based nonvolatile logic-in-memory (NV-LIM) architecture for ternary neural networks (TNNs) is proposed. The NV-LIM-based implementation achieves reduced computational cost and data transfer cost related to the inference function of deep neural networks. Through an experimental evaluation of a basic component of TNNs, its impact on the energy, delay and area overhead reduction is demonstrated.
机译:提出了一种基于三元神经网络(TNN)的基于MTJ的非易失性内存逻辑(NV-LIM)体系结构的三元逻辑门。基于NV-LIM的实现可降低与深度神经网络的推理功能相关的计算成本和数据传输成本。通过对TNNs基本组成部分的实验评估,证明了其对能量,延迟和面积开销减少的影响。

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