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SpaceCubeX: A framework for evaluating hybrid multi-core CPU/FPGA/DSP architectures

机译:SpaceCubeX:用于评估混合多核CPU / FPGA / DSP架构的框架

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The SpaceCubeX project is motivated by the need for high performance, modular, and scalable on-board processing to help scientists answer critical 21st century questions about global climate change, air quality, ocean health, and ecosystem dynamics, while adding new capabilities such as low-latency data products for extreme event warnings. These goals translate into on-board processing throughput requirements that are on the order of 100-1,000x more than those of previous Earth Science missions for standard processing, compression, storage, and downhnk operations. To study possible future architectures to achieve these performance requirements, the SpaceCubeX project provides an evolvable testbed and framework that enables a focused design space exploration of candidate hybrid CPU/FPGA/DSP processing architectures. The framework includes ArchGen, an architecture generator tool populated with candidate architecture components, performance models, and IP cores, that allows an end user to specify the type, number, and connectivity of a hybrid architecture. The framework requires minimal extensions to integrate new processors, such as the anticipated High Performance Spaceflight Computer (HPSC), reducing time to initiate benchmarking by months. To evaluate the framework, we leverage a wide suite of high performance embedded computing benchmarks and Earth science scenarios to ensure robust architecture characterization. We report on our projects Year 1 efforts and demonstrate the capabihties across four simulation testbed models, a baseline SpaceCube 2.0 system, a dual ARM A9 processor system, a hybrid quad ARM A53 and FPGA system, and a hybrid quad ARM A53 and DSP system.
机译:SpaceCubeX项目的动机是对高性能,模块化和可扩展的机载处理的需求,以帮助科学家回答21世纪有关全球气候变化,空气质量,海洋健康和生态系统动态的关键问题,同时增加诸如低碳排放等新功能。 -延迟数据产品,用于极端事件警告。这些目标转化为车载处理吞吐量的要求,该要求比以前进行标准处理,压缩,存储和下垂操作的地球科学任务要高出100-1,000倍。为了研究实现这些性能要求的未来可能的架构,SpaceCubeX项目提供了一个可扩展的测试平台和框架,可以对候选混合CPU / FPGA / DSP处理架构进行集中的设计空间探索。该框架包括ArchGen,这是一种架构生成器工具,其中填充了候选架构组件,性能模型和IP内核,该工具允许最终用户指定混合架构的类型,数量和连接性。该框架需要最少的扩展来集成新处理器,例如预期的高性能航天计算机(HPSC),从而将启动基准测试的时间缩短了数月。为了评估该框架,我们利用各种高性能嵌入式计算基准和地球科学方案来确保强大的体系结构表征。我们报告了项目第一年的工作成果,并展示了四个仿真测试平台模型,一个基础SpaceCube 2.0系统,一个双ARM A9处理器系统,一个混合四ARM A53和FPGA系统以及一个混合四ARM A53和DSP系统的功能。

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