Low frequency current ripple reduction of a current-fed switched inverter

摘要

Input current of a Current Fed Switched Inverter (CFSI) contains the switching frequency component (75 kHz) and a second harmonic component of line frequency (100 Hz) apart from the DC part. In prior designs, the second harmonic component was suppressed by increasing the size of passive components (inductor or capacitor), which makes the inverter implementation bulky. This paper presents a control based approach using which the DC side second harmonic power component of a CFSI is suppressed. Using the proposed scheme, the inductor size of a CFSI can be reduced by 46 % for the same ripple component. The control is validated using a 48 V DC input and 110 V AC output laboratory prototype with 500 W rating and good accuracy is obtained between simulation and experimental results.