Paralleled inverters with zero common-mode voltage

摘要

This paper introduces a PWM method for paralleled inverters which can achieve zero common-mode voltage. The paralleled inverters are connected through coupling inductors to the load. Based on the voltage vectors in each inverter, paralleled voltage vectors are proposed to combine the reference voltage. The action time can be distributed to each inverter and achieve zero common mode voltage for output. The distribution of voltage vectors in the two inverters is balancing the voltage of the two inverters in each switching cycle to make sure the circulating current can be easily controlled through small coupling inductors. Simulation and experimental results are provided to validate the proposed method and showing that it is benefiting for both CM and DM noise reduction.