Parallel, Asynchronous, Current-Mode Median Filter Based on Resistive Voltage Divider

摘要

The paper presents a novel non-linear median filter operating in the current mode. The filter consists of an analog and a digital part. A first layer of the analog part converts particular input signals, represented by currents, into 1-bit digital signals delayed by time periods inversely proportional to the values of the currents. The second block of the analog part of the system is a multi-branch resistive voltage divider, switched over by described digital signals. A digital block of the filter is used to determine the address of the input signal that in a given calculation cycle has a median value among all signal samples. The circuit was designed in the 180 nm CMOS technology and verified by comprehensive HSpice simulations. For the input currents up to 50 nA it offers data rate of 100 kSamples/s, dissipating power of 100 μW.