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A Ka-band GaAs MMIC quadrupler with high conversion gain and efficient rejection of undesired harmonics

机译:具有高转换增益和有效抑制不良谐波的Ka波段GaAs MMIC四倍频器

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A Ka-band monolithic frequency quadrupler with high conversion gain and efficient rejection of undesired harmonics based on 0.15um GaAs PHEMT process is presented in this paper. The quadrupler is constructed cascading an input power amplifier, a one-stage active quadrupling part and an amplifier of the fourth harmonic. Input power amplifier with one stage is designed for guarantee of proper input power of the quadrupler, so that the quadrupling part takes in its least conversion loss. Coupled with amplifying of the fourth harmonic by the amplifier behind the quadrupling part, the whole circuit realizes a high conversion gain. Efficient rejection of undesired harmonics can be reached by harmonic restrain structure inside the quadrupling part and a open stub between the quadrupling part and the amplifier behind it. According to the simulation results, when power of input signal at 8.5 GHz is -2 dBm, the conversion gain of the MMIC quadrupler is 18.23 dB. The rejection of fundamental is 61 dBc and rejection of unwanted harmonic is 45 dBc for second harmonic, 33 dBc for the third and 40 dBc for the fifth. The overall chip size is 2.88×2.06 mm2.
机译:本文提出了一种基于0.15um GaAs PHEMT工艺的具有高转换增益和有效抑制不良谐波的Ka带单片频率四倍频器。四倍频器由输入功率放大器,一级有源四倍频器部分和四次谐波的放大器级联而成。一级输入功率放大器的设计是为了保证四倍频器的适当输入功率,从而使四倍频器的转换损耗最小。加上四倍部分后面的放大器对四次谐波的放大,整个电路实现了很高的转换增益。通过四倍部分内部的谐波抑制结构以及四倍部分和它后面的放大器之间的开路短截线,可以有效抑制不想要的谐波。根据仿真结果,当8.5 GHz输入信号的功率为-2 dBm时,MMIC四倍频器的转换增益为18.23 dB。基频抑制为61 dBc,二阶谐波的抑制为45 dBc,三阶谐波为33 dBc,五阶为40 dBc。整体芯片尺寸为2.88×2.06 mm2。

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