首页> 外文会议>IEEE International Symposium on Circuits and Systems >Towards efficient and concurrent FFTs implementation on Intel Xeon/MIC clusters for LTE and HPC
【24h】

Towards efficient and concurrent FFTs implementation on Intel Xeon/MIC clusters for LTE and HPC

机译:在LTE和HPC的Intel Xeon / MIC集群上实现高效并发FFT实施

获取原文
获取外文期刊封面目录资料

摘要

Fast Fourier Transform (FFT) is an important part of many applications, such as in wireless communication based on OFDM (Orthogonal Frequency Division Multiplexing). With Cloud Radio Access Networks, implementing FFTs on multiprocessor clusters is a challenging task. For instance, supporting the Long Term Evolution (LTE) protocol requires processing 100 independent FFTs (with sizes ranging from 128 to 2048 points) in 66.7 μs. In this work, seven native FFT candidate implementations are compared. The considered implementation environments are: OpenMP (Open Multi-Processing) on 1 core, MPI (Message Passing Interface) on 1 core, 2 cores, and 3 cores, Hybrid OpenMP+MPI on 1 core and 3 cores, and MPI on an heterogeneous platform composed of Xeon-Phi and 3 cores. The reported experimental results show that the latter method meets the latency requirements of LTE. It is shown that the OpenMP and MPI paradigms running only on MICs (Many Integrated Cores) cannot benefit fully from the computing capability of many-core architectures. The heterogeneous combination of Xeon+MICs provides a better performance.
机译:快速傅立叶变换(FFT)是许多应用程序的重要组成部分,例如在基于OFDM(正交频分复用)的无线通信中。使用云无线电接入网,在多处理器集群上实现FFT是一项艰巨的任务。例如,支持长期演进(LTE)协议​​需要在66.7μs内处理100个独立的FFT(大小在128至2048点之间)。在这项工作中,比较了七个本机FFT候选实现。所考虑的实现环境是:1个内核上的OpenMP(开放多处理),1个内核,2个内核和3个内核的MPI(消息传递接口),1个内核和3个内核的Hybrid OpenMP + MPI,以及异构的MPI Xeon-Phi和3个核心组成的平台。报道的实验结果表明,后一种方法可以满足LTE的时延要求。结果表明,仅在MIC(许多集成核)上运行的OpenMP和MPI范例不能充分受益于多核体系结构的计算能力。 Xeon + MIC的异构组合提供了更好的性能。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号