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An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology

机译:采用28nm CMOS技术的62.5ps分辨率全数字PWM发生器

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摘要

This paper presents an all-digital pulse width modulator (PWM) for application in integrated DC-DC converters. Based on a multi-phase clock signal a PWM resolution of 62.5ps is achieved, resulting in up to 16-Bit PWM resolution at 4096ns period. The PWM signal duty cycle and period can be arbitrarily changed within a single cycle which allow efficient alldigital implementation of spread spectrum clocking schemes. The circuit has been implemented in 28nm SLP CMOS technology. It consumes 0.3mW when operating from a 1.0V supply.
机译:本文提出了一种用于集成DC-DC转换器的全数字脉冲宽度调制器(PWM)。基于多相时钟信号,可以实现62.5ps的PWM分辨率,从而在4096ns的周期内提供高达16位的PWM分辨率。 PWM信号的占空比和周期可以在单个周期内任意更改,从而可以有效地实现扩频时钟方案的全数字实现。该电路已采用28nm SLP CMOS技术实现。当使用1.0V电源工作时,其功耗为0.3mW。

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