Direct Digital Modulation and RFDAC for Generation of Frequency Ramps in FMCW Radar

摘要

The frequency chirps applied in frequency modulated continuous wave (FMCW) radars are typically generated using a PLL imposing trade-offs between noise and modulation accuracy. We are removing this compromise by employing a fixed frequency PLL, direct digital chirps generation and up-conversion to RF using an RFDAC. With a simplified PLL requirement and better exploitation of nm-scale CMOS digital performance, we achieve lower noise, less chip area, and frequency error, and remove the issues with frequency ramp non-linearities in conventional FMCW architectures.