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27.6 Background Capacitor-Current-Sensor Calibration of DC-DC Buck Converter with DVS for Accurately Accelerating Load-Transient Response

机译:27.6背景电容器 - 电流传感器校准DC-DC降压转换器,用于准确加速负载瞬态响应

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Switching buck converters with dynamic voltage scaling (DVS) for high-efficiency high-performance computing applications need to reduce the output-voltage undershoot/overshoot (VUS/VOS) and settling time tS under a large and fast-changing load current (Iload). A multiphase topology with a fast load-transient response meets these requirements. The load-transient response can be accurately accelerated to reduce VUS/VOS and tS to near their ideal values by measuring the output-capacitor current ICo to control the inductor's energizing and de-energizing times, since ICo instantly reflects the load-current transients. An integrated capacitor-current sensor (CCS) [1] can be used to sense ICo by emulating the output-capacitor impedance ZCo: comprising capacitance C0, the equivalent series resistance RESR, and inductance LESL. However, ICo will be inaccurately sensed if ZCo varies with different output voltages V0, manufacturing variations, PCB parasitics, temperature, and aging. The state-of-the-art CCS calibration technique [1] for such ZCo variations is suitable for foreground operation and DVS with pre-characterized V0 levels, since calibration starts immediately after being enabled and runs continuously until it ends. The CCS in [1] is calibrated with a low-power cost-effective comparator and successive approximation logic, with an acceptable calibration time TCAL for foreground operation. To broaden the range of applications, this work proposes an ADC-based CCS and a background CCS calibration (BCC) controller. The proposed CCS uses a flash ADC with a dynamic reference to shorten TCAL. The BCC controller automatically finds a quasi-steady state (QS), namely a short period of steady-state behavior when there is no load transient or DVS event, to trigger CCS calibration, and can interrupt CCS calibration when
机译:开关带动态电压缩放(DVS)的降压转换器,用于高效高性能计算应用需要减少输出电压下冲/过冲(V.<子的xmlns:MML = “http://www.w3.org/1998/Math/MathML” 的xmlns:的xlink = “http://www.w3.org/1999/xlink”> US / V. OS )和安定时间t s 在大而快速变化的负载电流(i load )。具有快速负载瞬态响应的多相拓扑符合这些要求。可以准确地加速负载瞬态响应以减少v我们/ V.<子的xmlns:MML = “http://www.w3.org/1998/Math/MathML” 的xmlns:的xlink = “http://www.w3.org/1999/xlink”> OS 和T s 通过测量输出电容器电流I接近其理想值 co <​​/ sub> 自I款以来,控制电感器的激励和断电时间<子的xmlns:MML = “http://www.w3.org/1998/Math/MathML” 的xmlns:的xlink = “http://www.w3.org/1999/xlink”>钴 立即反映负载电流瞬变。集成电容器电流传感器(CCS)[1]可用于感测I co <​​/ sub> 通过模拟输出电容阻抗z co <​​/ sub>:包括电容c 0 ,等效串联电阻r ESR 和电感l esl 。但是,我 co <​​/ sub> 如果Z,将不准确地感受到<子的xmlns:MML = “http://www.w3.org/1998/Math/MathML” 的xmlns:的xlink = “http://www.w3.org/1999/xlink”>钴 随着不同的输出电压V而变化 0 ,制造变异,PCB寄生菌,温度和老化。最先进的CCS校准技术[1]如此z<子的xmlns:MML = “http://www.w3.org/1998/Math/MathML” 的xmlns:的xlink = “http://www.w3.org/1999/xlink”>钴 变化适用于前景操作和DVS,具有预先表征V. 0 级别,因为校准在启用后立即启动并连续运行直到它结束。 [1]中的CCS用低功耗成本高效的比较器和连续近似逻辑校准,具有可接受的校准时间t cal 用于前景操作。为了拓宽应用范围,这项工作提出了基于ADC的CC和背景CCS校准(BCC)控制器。所提出的CCS使用闪存ADC具有动态引用来缩短T. cal 。的BCC控制器自动地找到一个准稳态(QS),即稳态行为短时间当没有负载瞬变或DVS事件,以触发CCS校准,并可以中断CCS校准时

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