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ICCAD-2014 CAD contest in incremental timing-driven placement and benchmark suite: Special session paper: CAD contest

机译:ICCAD-2014 CAD竞赛,采用增量时序驱动的布局和基准套件:专题报告:CAD竞赛

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Circuit performance is greatly affected by the quality and optimization metrics of placement algorithms. At modern technology nodes, improving routability and reducing total wirelength are no longer sufficient to close timing, as nets may require specialized attention to reduce negative slack. To this end, incremental timing-driven placement (TDP) seeks to address these imposed timing constraints by leveraging timing information during optimization while respecting relative density and displacement thresholds with respect to the original placement. The goal of the ICCAD-2014 Contest is to encourage research in incremental TDP by providing (i) a flexible timing-oriented placement framework, including a publicly-available academic timer, (ii) a set of benchmarks and the associated cell library with timing information and (iii) an evaluation metric that objectively defines the quality of newly-developed algorithms.
机译:放置算法的质量和优化指标极大地影响了电路性能。在现代技术节点上,提高可路由性和减少总线长不再足以关闭时序,因为网络可能需要特别注意以减少负松弛。为此,增量时序驱动布局(TDP)试图通过在优化过程中利用时序信息来解决这些施加的时序约束,同时尊重相对于原始布局的相对密度和位移阈值。 ICCAD-2014竞赛的目标是通过提供(i)灵活的,面向时序的放置框架(包括公开可用的学术计时器),(ii)一组基准以及与时序相关的单元库来鼓励对增量TDP进行研究信息和(iii)客观地定义新开发算法质量的评估指标。

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