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An integrated 60GHz 5Gb/s QPSK transmitter with on-chip T/R switch and fully-differential PLL frequency synthesizer in 65nm CMOS

机译:集成的60GHz 5Gb / s QPSK发送器,带有片上T / R开关和65nm CMOS的全差分PLL频率合成器

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An integrated 60GHz 5Gb/s QPSK transmitter with on-chip T/R switch and fully-differential PLL frequency synthesizer in 65nm CMOS is presented. Direct QPSK modulation is implemented during the first up-conversion, followed by the final up-conversion mixer and power amplifier (PA) as well as on-chip T/R switch. Distributed amplifier technique is utilized to extend the bandwidth of PA. Along with other bandwidth extension techniques, in-band gain variation in signal link is minimized to improve the error vector magnitude (EVM). To reject common-mode noise and improve phase noise performance, a 40GHz fully-differential PLL frequency synthesizer is implemented to provide LO signals and various clocks. The measured output power is 6.4dBm at 60GHz, with 1.2dB gain variation over >6GHz bandwidth. On-chip 27-1 PRBS generators are used to measure the transmitter performance, and the measured EVM is −21.9dB with 5Gb/s QPSK modulation. The transmitter and the PLL & LO distribution network consume 73mW and 62mW, respectively.
机译:提出了一个集成的60GHz 5Gb / s QPSK发送器,该发送器具有片上T / R开关和65nm CMOS的全差分PLL频率合成器。直接QPSK调制是在第一个上变频过程中实现的,随后是最终的上变频混频器和功率放大器(PA)以及片上T / R开关。利用分布式放大器技术来扩展PA的带宽。与其他带宽扩展技术一起,可将信号链路中的带内增益变化最小化,以改善误差矢量幅度(EVM)。为了抑制共模噪声并改善相位噪声性能,实现了40GHz全差分PLL频率合成器,以提供LO信号和各种时钟。在60GHz时测得的输出功率为6.4dBm,在> 6GHz带宽上增益变化为1.2dB。片内2 7 -1 PRBS发生器用于测量发射机性能,在5Gb / s QPSK调制下,测得的EVM为−21.9dB。发送器和PLL&LO分配网络分别消耗73mW和62mW。

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