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A flexible interface architecture for reconfigurable coprocessors in embedded multicore systems using PCIe Single-root I/O virtualization

机译:使用PCIe单根I / O虚拟化的嵌入式多核系统中可重新配置协处理器的灵活接口架构

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Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In this paper, we propose a flexible interface architecture with low overhead for coupling reconfigurable coprocessors to high-performance general-purpose processors, allowing customized yet efficient construction of heterogeneous processing systems. Our implementation is based on PCI Express (PCIe) and optimized for virtualized systems, taking advantage of the SR-IOV capabilities in modern PCIe implementations. We describe the interface architecture and its fundamental technologies, detail the services provided to individual coprocessors and accelerator modules, and quantify key corner performance indicators relevant for virtualized applications.
机译:特别是在系统的系统的复杂场景中,其中多个高性能或实时处理功能需要共存和相互作用时,可重新配置的设备具有虚拟化技术一起示出相当大的希望,以提高效率,易于集成以及维持功能性的和非的各个功能的功能性质。在本文中,我们提出了以低开销灵活的接口架构可重配置协处理器连接到高性能通用处理器,从而可以实现定制又异构处理系统的高效施工。我们的实现是基于PCI Express(PCIe)的和虚拟化系统进行了优化,同时在现代的PCIe实现的SR-IOV功能的优势。我们描述的界面架构和基础技术,详细地提供给各协处理器和加速器模块,以及相关的虚拟化应用程序键进行量化角落性能指标的服务。

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