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A Pipelined 3-Level Bandpass Delta-Sigma Modulator for Class-S Power Amplifiers

机译:用于类功率放大器的流水线3级带通δ-Sigma调制器

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A digital bandpass delta-sigma modulator for class-S power amplifiers is presented. In comparison to a 2-level modulator coding efficiency can be increased by 10% over a large input power range with a 3-level modulator. Scaling the quantizer thresholds offers a trade-off between coding efficiency and signal-to-noise ratio. The bandpass modulator architecture allows twofold interleaving. A constraint on the quantizer thresholds and the feedback values reduces the effective operand word width in the feedback loop to the 5 most significant bits. Pipelining of the less significant bits leads to a short critical path. Interleaving and pipelining promise fast operation and thus a high maximum signal frequency.
机译:提出了一种用于类功率放大器的数字带通Δ-Sigma调制器。与2级调制器编码效率相比,通过具有3级调制器的大输入功率范围可以增加10%。缩放量化阈值在编码效率和信噪比之间提供权衡。带通调制器架构允许双重交错。对量化阈值的约束和反馈值将反馈循环中的有效操作数宽度降低到5个最高有效位。流水线不太有效的位导致短期关键路径。交错和流水线承诺快速操作,从而高最大信号频率。

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