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Approximate matrix inversion for high-throughput data detection in the large-scale MIMO uplink

机译:大规模MIMO上行链路中用于高吞吐量数据检测的近似矩阵求逆

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The high processing complexity of data detection in the large-scale multiple-input multiple-output (MIMO) uplink necessitates high-throughput VLSI implementations. In this paper, we propose — to the best of our knowledge — first matrix inversion implementation suitable for data detection in systems having hundreds of antennas at the base station (BS). The underlying idea is to carry out an approximate matrix inversion using a small number of Neumann-series terms, which allows one to achieve near-optimal performance at low complexity. We propose a novel VLSI architecture to efficiently compute the approximate inverse using a systolic array and show reference FPGA implementation results for various system configurations. For a system where 128 BS antennas receive data from 8 single-antenna users, a single instance of our design processes 1.9M matrices/s on a Xilinx Virtex-7 FPGA, while using only 3.9% of the available slices and 3.6% of the available DSP48 units.
机译:大规模多输入多输出(MIMO)上行链路中数据检测的高处理复杂性使得需要高吞吐量的VLSI实现。在本文中,据我们所知,我们提出了第一个矩阵求逆实现,适用于基站(BS)上有数百个天线的系统中的数据检测。基本思想是使用少量的诺伊曼级数项进行近似矩阵求逆,从而使人们能够以低复杂度实现接近最佳的性能。我们提出了一种新颖的VLSI架构,以使用脉动阵列有效地计算近似逆,并显示了针对各种系统配置的参考FPGA实施结果。对于128个BS天线从8个单天线用户接收数据的系统,我们的设计实例在Xilinx Virtex-7 FPGA上处理1.9M矩阵/秒,而仅使用3.9%的可用切片和3.6%的可用切片。可用的DSP48单元。

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