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A 684Mbps 57mW joint QR decomposition and MIMO processor for 4×4 MIMO-OFDM systems

机译:用于4×4 MIMO-OFDM系统的684Mbps 57mW联合QR分解和MIMO处理器

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This paper presents a configurable MIMO detector with QR decomposition and channel interpolation for 4×4 MIMO-OFDM systems. QR decomposition (QRD) processor and MIMO detector are usually investigated independently in the literature; however, this methodology usually limits operating condition to only slow fading channel. Therefore, this study jointly designs a hardware architecture for QR decomposition and MIMO detection without interface memory buffer, and the channel interpolation is also performed at the same time. This QR-based MIMO detector is implemented in a 90nm CMOS process with 2.02mm2 core area. The chip consumes 56.8mW at 114MHz operating frequency with 1.0V supply and achieves 684Mbps throughput. The proposed chip, which performs one QRD and one MIMO detection for one OFDM symbol, is the first MIMO detector in the literature that supports real-time QR decomposition and MIMO detection for fast fading MIMO-OFDM systems.
机译:本文提出了一种用于4×4 MIMO-OFDM系统的具有QR分解和信道插值的可配置MIMO检测器。 QR分解(QRD)处理器和MIMO检测器通常在文献中进行独立研究。然而,这种方法通常将工作条件限制为仅慢速衰落信道。因此,本研究共同设计了一种无需接口存储缓冲器的QR分解和MIMO检测的硬件架构,并且信道插值也可以同时进行。这款基于QR的MIMO检测器在90nm CMOS工艺中实现,核心面积为2.02mm 2 。该芯片在工作频率为114MHz,1.0V电源下的功耗为56.8mW,并实现了684Mbps的吞吐量。所提出的芯片对一个OFDM符号执行一个QRD和一个MIMO检测,是文献中的第一个支持实时QR分解和MIMO检测的MIMO检测器,用于快速衰落MIMO-OFDM系统。

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