A novel data format conversion method based on FPGA

摘要

Most FPGA support floating-point IP core nowadays, but we have paid little attention to the acquisition of data source. A conversion method is advanced in this paper for the reason. A certain range of real number presented by ASCII code is converted to single precision floating-point by pipeline processing with VHDL language. Through functional simulation and download verification, the conversion time is about 10−1us when the clock is 50 MHz. The conversion accuracy of this method can reach 10−9 calculated by MATLAB software. The design in this paper has a rational construction and can provide data source for floating-point IP core.