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A Compact Microstrip Power Divider Using Periodic DGS and HIOS

机译:使用周期性DGS和HIPS的紧凑型微带功率分配器

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In this paper, miniaturized branch-line couplers (BLCs) are designed, simulated and fabricated using FR4 substrate at the operating frequency 2.4 GHz. First, high impedance open stubs (HIOS) are used to miniaturize the conventional BLC using the combinational-model (combinational of T and 7r-model). The proposed design is reduced by more than 57.5% compared to the conventional design. The second step is to use defected ground structure (DGS) underneath the BLC. The proposed design is capable to achieve any dividing ratio without reducing the width of the line, which means that the power handling capability is not reduced. In addition, suppression of higher order modes is achieved and more than 18% reduction in size as compared to the conventional shape is obtained. As a final step, the two techniques are combined together and a third BLC is proposed. Good agreement is found between experimental and simulated results using the software package Zeland IE3D.
机译:在本文中,使用FR4基板在2.4 GHz的工作频率下设计,仿真和制造了微型支线耦合器(BLC)。首先,使用高阻抗开放式存根(HIOS)使用组合模型(T和7r模型的组合)将常规BLC小型化。与常规设计相比,建议的设计减少了超过57.5%。第二步是在BLC下方使用有缺陷的地面结构(DGS)。所提出的设计能够在不减小线宽的情况下实现任何分频比,这意味着不会降低功率处理能力。此外,与传统形状相比,抑制了高阶模,并且尺寸减小了18%以上。作为最后一步,将这两种技术结合在一起,并提出了第三个BLC。使用Zeland IE3D软件包在实验结果和模拟结果之间找到了很好的一致性。

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