This paper presents the implementation result of List-of-2 soft-decision Viterbi decoder on FPGA platform. It was to be used as the inner decoder of a special designed concatenated code, of which the outer decoder is Vector Symbol Decoder (VSD). Since list-of-2 Viterbi was not the final decoding stage, it was not required to provide low decoding failure probability. Therefore, only a small list of 2 was enough. This use of list inner decoder is useful to VSD only if the second inner decoded sequence is correct when the first one was wrong. The result shows that this probability of interest is high for low-SNR AWGN channel and BFSK scheme. Therefore, List-of-2 Viterbi would be attractive for VSD for this channel. The operation of this lab prototype was tested by comparing its decoding failure probabilities with the results from C++. The results showed that they were almost the same, which proved that the lab prototype worked properly.
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