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Design methods of Multi-DSP Parallel Processing System

机译:多DSP并行处理系统的设计方法

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In this paper, the cascaded topology of Multi-Digital Signal Processor (DSP) parallel processing system is presented, and the common architecture for multi-DSP parallel systems is summarized. In addition, according to the features of Field Programmable Gate Array (FPGA) and DSP, a parallel system based on 2-level bus structure has been proposed. Two parallel systems, respectively based on TMS320C641x and TS201, have been realized too. Having compared their advantages and performances, we finally conclude the design methods of multi-DSP parallel processing system.
机译:本文介绍了多数字信号处理器(DSP)并行处理系统的级联拓扑,总结了多DSP并行系统的公共架构。另外,根据现场可编程门阵列(FPGA)和DSP的特征,已经提出了一种基于2级总线结构的并行系统。也已经实现了两个并行系统,分别基于TMS320C641X和TS201。相比,优势和性能,我们最终得出多DSP并行处理系统的设计方法。

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