首页> 外文会议>International conference on computer systems and technologies and workshop for PhD students in computing 2009 >Systematic Power-Performance Trade-Off in MPEG-4 by Means of Selective Function Inlining Steered by Address Optimization Opportunities
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Systematic Power-Performance Trade-Off in MPEG-4 by Means of Selective Function Inlining Steered by Address Optimization Opportunities

机译:通过地址优化机会控制的选择性功能内联,在MPEG-4中进行系统的功率性能折衷

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The hierarchical structure of real-life data dominatedapplications limits the exploration space for high level optimisations.This limitation is often overcome by func-tioninlining. However, it increases the basic block codesize, which causes a significant growth of instruction cachemisses and thus performance slow-down. This effect hasbeen confirmed on experiments with our applications. We have developed a novel methodology for selectivefunction inlining steered by cost/gain balance to trade-offpower and performance. Although this results in a speedup, the increase of the instruction cache misses is stillpresent, i.e. the memory power consumption is higher. Thisimplies the possibility of the Pareto-optimal trade-offs betweenmemory power and performance. Our methodologyis demonstrated on an MPEG-4 video decoder.
机译:现实生活中以数据为主的应用程序的层次结构限制了高级别优化的探索空间。此限制通常可以通过函数内联来克服。但是,它增加了基本块代码大小,这导致指令高速缓存未命中的大量增加,从而降低了性能。这种效果已经在我们的应用实验中得到证实。我们已经开发出一种新的方法,用于选择性功能内联,该内联由成本/收益平衡控制,以权衡取舍和性能。尽管这导致加速,但是仍然存在指令高速缓存未命中的增加,即存储器功耗更高。这暗示了在存储能力和性能之间进行帕累托最优折衷的可能性。我们的方法论在MPEG-4视频解码器上得到了证明。

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