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Implementation of H.264 on TMS320DM642

机译:H.264在TMS320DM642上的实现

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摘要

H.264/AVC is the newest video standard to resolve the efficient transmission of video data.Compared to previous generations,it delivers better quality at lower bit rates. However,its computational complexity increases almost exponentially,which is still a problem and has motivated much research into H.264 real-time codec both in industry and academia. H.264 baseline real-time video decoder implementation based on TMS320DM642 and JM86 test code is described in this paper. Firstly,the structure of JM86 is rearranged into three parallel tasks using BIOS multithreading technology. Then,the data structure is redesigned to make full use of the DSP memory and to improve the addressing capability of array and pointer. Finally,lots of time-consuming functions of JM86 are rewritten with assembly language. The system highly speeded up the decoding while maintaining the quality as well. For video sequence of D1 format,the decoding speed reached 25 frames per-second and for CIF format,it reached 60 frames per-second.
机译:H.264 / AVC是解决视频数据高效传输的最新视频标准。与前几代产品相比,H.264 / AVC以更低的比特率提供了更高的质量。但是,它的计算复杂度几乎成倍增加,这仍然是一个问题,并且已经引起了工业界和学术界对H.264实时编解码器的大量研究。本文介绍了基于TMS320DM642和JM86测试代码的H.264基线实时视频解码器实现。首先,利用BIOS多线程技术将JM86的结构重新安排为三个并行任务。然后,重新设计数据结构以充分利用DSP存储器并提高数组和指针的寻址能力。最后,许多JM86耗时的功能都用汇编语言进行了重写。该系统在保持质量的同时还加快了解码速度。对于D1格式的视频序列,解码速度达到每秒25帧,对于CIF格式,其解码速度达到每秒60帧。

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