Design and optimization of emulated peak-current mode controlled buck regulators

摘要

In this paper the optimization of dc-dc buck converter with Emulated Peak Current Mode Control is discussed. The design approach presented in the paper is aimed at achieving a trade-off between static and dynamic performances in high-current applications, which is necessary because of the critical role played by the MOSFETs. To this purpose, a set of design boundary curves is identified by using jointly the equations used for stability analysis and those ones used for MOSFETs loss analysis.