首页> 外文会议>Evolvable Hardware, 2005. Proceedings. 2005 NASA/DoD Conference on >Adaptive genetic algorithm based approach for evolutionary design and multi-objective optimization of logic circuits
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Adaptive genetic algorithm based approach for evolutionary design and multi-objective optimization of logic circuits

机译:基于自适应遗传算法的逻辑电路进化设计和多目标优化方法

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摘要

Evolvable hardware is an artificial-evolution based promising path to automated design of circuits and discovery of fancy modules and principles. To improve gate-level evolution of logic circuits in speed and scale for synthetically optimized design results, an adaptive genetic algorithm based approach is presented in this paper. First, it employs an array-model-based encoding scheme that allows flexible changes of comprised logic cells' logic functions and interconnections. Second, it adopts a multi-objective fitness evaluation mechanism with weight-vector adapting and circuit simulation. Third, it features an adaptation strategy that enables crossover probability and mutation probability to vary with the individual diversity and the genetic process. By virtue of these measures, it was validated effective, efficient and innovative by some experiments on arithmetic circuits, in which we obtained functionally correct circuits with novel structures, fewer logic cells and higher operating speed as compared with results of some conventional or evolutionary approaches.
机译:可进化的硬件是一种基于人工进化的有前途的途径,可以自动设计电路并发现精美的模块和原理。为了提高逻辑电路的门级演化速度和规模,以获得综合优化的设计结果,本文提出了一种基于自适应遗传算法的方法。首先,它采用基于阵列模型的编码方案,该方案允许灵活更改所包含的逻辑单元的逻辑功能和互连。其次,采用权重向量自适应和电路仿真的多目标适应性评估机制。第三,它具有适应策略,可以使交叉概率和突变概率随个体多样性和遗传过程而变化。借助于这些措施,通过对算术电路的一些实验证明它是有效,高效和创新的,与某些传统方法或进化方法的结果相比,我们获得了功能新颖,结构新颖,逻辑单元更少,工作速度更高的功能正确的电路。

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