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The IC Module Compiler, A VLSI System Design Aid

机译:IC模块编译器,VLSI系统设计辅助

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The IC Module Compiler is a new design aid that applies structured hierarchical design methodology, similar to aspects of the methodology pioneered by the Caltech Silicon Structures Project [GRA79], to the task of defining VLSI chip logic. It converts designs described as interconnections of MSI level modules into detailed logic or functional descriptions for simulators and other chip design aids. Detailed models of the modules, including adders, counters, multiplexers and memory elements, are stored in a library. Along with a simple syntax for circuit connectivity data, the Module Compiler language features C language style constructs to support module parameterization and maximize flexibility. This paper describes the features and structure of the Module Compiler and illustrates its application through examples.
机译:IC模块编译器是一种新的设计辅助工具,将类似于Caltech Silicon Structures Project [GRA79]率先采用的结构化分层设计方法应用于定义VLSI芯片逻辑的任务。它将描述为MSI级别模块的互连的设计转换为针对模拟器和其他芯片设计辅助工具的详细逻辑或功能描述。模块的详细模型,包括加法器,计数器,多路复用器和存储元件,都存储在库中。除了电路连接数据的简单语法外,模块编译器语言还具有C语言样式构造,以支持模块参数化并最大程度地提高灵活性。本文介绍了模块编译器的功能和结构,并通过示例说明了其应用。

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