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Security vs. test quality: can we really only have one at a time?

机译:安全性与测试质量:我们真的一次只能拥有一个吗?

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Summary form only given. Increasingly, chips are being utilized in applications where security is a key aspect: banking, price tagging, pay-tv, etc. Security is important, as privacy, personal integrity, and money is involved. Security requires as little observability and controllability of on-chip data as possible, in order to withstand even advanced high-tech hackers. In addition, we as IC design community want of course that our intellectual property in the design itself is protected from copying by others. Good manufacturing test quality on the other hand depends on good controllability and observability of on-chip data. Design-for-testability hardware is added to most ICs to enhance the internal controllability and observability and hence enable high test quality. Are these two aspects indeed contradictory, and can we have only one at a time? If that is the case, isn't the product quality of secure chips on which we store our virtual money or personal data in jeopardy? In this panel session, we discuss with representatives from the secure industry (who typically hide from publicity) and test solution providers how they untie this knot, and what challenges are still ahead.
机译:仅提供摘要表格。越来越多的芯片用于安全性是关键方面的应用中:银行,价格标签,付费电视等。安全性很重要,因为涉及隐私,个人诚信和金钱。安全性要求尽可能少的片上数据的可观察性和可控制性,以抵御甚至高级的高科技黑客。此外,我们作为IC设计社区当然希望我们设计中的知识产权受到保护,以防止他人复制。另一方面,良好的制造测试质量取决于片上数据的良好可控性和可观察性。可测试性设计硬件已添加到大多数IC中,以增强内部可控制性和可观察性,从而实现较高的测试质量。这两个方面确实矛盾吗,我们一次只能有一个吗?如果是这样,我们存储虚拟货币或个人数据的安全芯片的产品质量不是危险的吗?在本小组会议中,我们与安全行业的代表(通常不为人所知)进行讨论,并测试解决方案提供商如何解开这一难题,以及仍然面临哪些挑战。

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