首页> 外文会议>Test Conference, 2004. Proceedings. ITC 2004 >Panel 7 : cost of test - taking control failure mechanism
【24h】

Panel 7 : cost of test - taking control failure mechanism

机译:第7组:测试成本-采取控制措施故障机制

获取原文

摘要

Nanometer technology have not only resulted in increasingly complex chips but is also exposing new defects and failure mechanisms during manufacturing that are challenging process and test engineers while they struggle to maintain high yield and low DPM. Silicon manufacturers are increasingly using structural test vectors to improve the process and consequently, reduce the defect rates. Structural vectors help detect defective parts and debug issues in an automated manner, which subsequently allows ramping up the yield for a given process fairly quickly. In addition, it reduces the number of escaped parts thereby guaranteeing lower DPM and fewer field returns. However, relying more on structural tests implies that the test set should be of the highest quality and may include vectors for fault models (in addition to stuck-at faults) such as transition, path-delay, bridging, n-detect, in-line resistance, Iddq, etc., covering some of the new failure mechanisms.
机译:纳米技术不仅导致芯片变得越来越复杂,而且还在制造过程中暴露出新的缺陷和故障机制,这些挑战和过程工程师在保持高成品率和低DPM的同时,对工艺和测试工程师提出了挑战。硅制造商越来越多地使用结构测试向量来改善工艺,从而降低缺陷率。结构矢量有助于自动检测缺陷零件并调试问题,随后可以相当快地提高给定过程的良率。此外,它减少了逃逸零件的数量,从而保证了较低的DPM和较少的场返回。但是,更多地依赖于结构测试意味着测试集应该是最高质量的,并且可能包括故障模型的矢量(除了故障卡住的情况),例如过渡,路径延迟,桥接,n-detect,in-线路电阻,Iddq等,涵盖了一些新的故障机制。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号